"Wow! That feels better!"

Well, I published chapter 6 of "FPGAs?! Now What?" back on Aug 30, 2011. And today I'm finally delivering chapter 7 with all the personal anticipation usually associated with the end to a bout of constipation.

This chapter covers how to use the internal RAMs of an FPGA, and also discusses how to read and write to an external SDRAM. I always have trouble writing about RAMs. I can remember procrastinating for months on the memory chapter for the "Pragmatic Logic Designer" book back in 2000. That one was 56 pages, while this current chapter is a paltry 39 pages. Of course, I'm still not done writing about memories so I might beat the record in a chapter or two.

It's not like I was sitting around over the past six months: I designed and released the StickIt! boards and built a prototype for a new version of the XuLA board. But I started getting that pressured feeling back in December that I'd better get back to work on the book. I wrote a few example designs and roughed in the major chapter sections, but I never achieved escape velocity.

I took up the chapter again about 2-1/2 weeks ago and gave it my highest priority so I could finally push this thing out. (Well, second-highest priority; afternoon naps really have to come first.) And I'll tell you that after a six month hiatus, it was like trying to finish a book someone else had started: "Where do I begin? What does the reader already know? Is cursing allowed? How do I format code listings? Oh God, is that a gerund or a present participle?!"

But I persevered and today I was greeted with a satisfying "plop" as this steaming turd was flushed out onto the web for everyone (anyone?)  to read. It ain't Hemingway but, as Stephen King once said to his critics, "I'm trying as hard as I can!" If you don't  like it, tell me how to make it better. Or, better yet, re-write it yourself. It's open source for a reason, ya know. And remember that all the source files for this book - including the FPGA projects - are available at Github.

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Comments

Regarding chapter 6, Leds Buttons: Is there source code for the XuLa_jtag.hex file?  You said in an other post that some one is working on a linux port of XstoolsApi.dll, has anything come of that?

I'm working right now on the transferring XstoolsApi.dll into python so it can run unc\der linux.
I still haven't released the updated XuLA_jtag code that supports the HostIo stuff because there seems to be an error in it when it does large memory transfers.

Hello Dave, If you put the source on github then we can have a look and maybe help to fix the problem. If possible, describe how to reproduce the bug. When you say "large memory transfers", do you mean from/to the SDRAM or from/to the FPGA's BRAM? Recently I had the XuLA board running for several days connected to a PC doing continuous HostIO transfers and never noticed any lockups or data corruption.
 

 
Hector, I think the problem was a USB timeout for large data transfers. I fixed it in the python code by upping the timeout.
I just placed all the XuLA stuff in an integrated repository. You'll find the schematic, pcb layout, uC firmware, FPGA design examples, documentation and some other stuff there. That will be the main repository for everything XuLa from now on.
All the XSTOOLs stuff is in its own repo. I've switched over to a pure-python approach, so the C++ stuff isn't going to go much farther (unless someone else wants to pick that up).
I would be interested in hearing what you're doing that requires continuous hostio transfers over the course of days.

 

I was just running a test. I made an analog acquisition board using a 40MHz 12-bit ADC and connected it to the XuLA board to gather the data and send the stream to a PC. A quick VB application was used to display the waveform, spectrum, etc. The FPGA was also used to do some processing (e.g. FT). I'll upload the board schematics and PCB (KiCAD format) to the files section of the forum, as well as some design samples (simple scope using the VGA module, etc.) I'm planning to make a dual ADC version for I/Q processing of RF signals.
 

Hector, that sounds really useful! You might want to put your files onto Github so they get wider circulation. I can place a link to them on the XESS website.